HPC
HPC

| HPC and Data for Lattice QCD

Sofan Features

HPC and Data for Lattice QCD

Sofan Features

Features

Analyses and scopes:
  • Control Flow Analysis (with SIMD extensions) — procedural
  • Dominators & Loop detection
  • Data Flow Analysis — procedural:
    • Liveness
    • Reaching defs
    • Avail. expressions
    • DU/UD-chain construction
  • Code instrumentation
Procedural transformations/optimizations::
  • Copy Propagation
  • Dead Code Elimination
  • Register Renaming
  • CSE
Peephole optimizations::
  • Fusion of multiply-add instructions (CNORM, FNORM)
  • Optimized address generation
  • Copy propagation upwards
  • Strength reduction
Work in progress::
    Coarse-grain code pre-scheduling in attempt to:
  • detect more ILP
  • aid the final microcode scheduling which is intrinsically limited
  • properly utilize architectural datapaths (code re-selection)
  • be aware of the register use throughout applications (register allocation awareness)