Topology

HPC and Data for Lattice QCD

Topology

An APEmille machine is a 3D grid of processing nodes with hardware data links between the 3D first neighbouring nodes. The smallest machine is the single Processing Board (PB) whith 8 processing nodes with a 2x2x2 topology, (cube).

APEmille topologies in detail:

Board or Cube: Geometry: 2 x 2 x 2
Communication: onboard

Unit

Geometry: 2 x 2 x 8
Communication: onboard, backplane (z)

Crate

Geometry: 2 x 8 x 8
Communication: onboard, backplane (y,z)

Rack

Geometry: 4 x 8 x 8
Communication: onboard, backplane (y,z), external cabling (x)

Tower

Geometry: 8 x 8 x 8
Communication: onboard, backplane (y,z), external cabling (x)

Global Architecture

In each APEmille installation, CPCI PC is used as I/O server for up to four Processing Boards. If the geometry of the APEmille machine exceeds one unit (2x2x8 nodes) these PCs themselves are connected via the Host-Network to the control process (APEos) and run only a stripped down (Slave-) version of the APEos. Since the control process can also manage the whole disk-I/O of the application program, network bandwith should be designed sufficiently large. For the installation at Zeuthen this bandwidth is provided by a high-speed network with ring-topology (FLink).
global architecture